AMD unleashes 84-core Sorano chip and turns up pressure on Intel in the escalating telecom infrastructure showdown
- AMD is aggressively expanding into virtualized 5G infrastructure and edge deployments
- AMD Sorano now offers 84 cores for demanding telecom network workloads
- Improving LDPC decoding efficiency directly affects overall network capacity scaling
AMD introduced its latest Epyc 8005 series processors, named Sorano, with a clear focus on telecommunications and edge infrastructure.
The new chips increase the core count to 84 Zen 5 cores, marking a notable jump from the previous generation Siena.
Its power consumption can reach 225 watts, while lower thermal envelopes can follow based on previous designs.
Zen 5 Epyc family expansion for edge workloads
Sorano is designed for virtualized radio access network deployments, where operators increasingly rely on off-the-shelf server hardware rather than proprietary systems.
In this environment, CPU throughput and predictable latency matter more than maximum clock speed.
AMD says the architecture includes a full 512-bit datapath for vector instructions, reflecting broader Zen 5 changes already disclosed by the company.
A central demand around Sorano involves improvements to decoding low-density parity checks, a key requirement of 5G networks.
According to AMD, greater efficiency in LDPC management allows operators to free up compute capacity for additional Layer 1 and 2 processing, which could result in more network functions performed per server within a data center or edge facility. The company also emphasizes energy efficiency as well as higher base density.
If Sorano mirrors Siena’s lower-power variants, telcos could see configurations below 100 watts for specific deployments.
In extreme scenarios, where thermal limits and environmental tolerances are stricter, the balance between performance and consumption has financial implications.
AMD’s latest move isn’t happening in isolation. Intel continues to develop its own processors for telecommunications, including the Xeon 6E and Xeon 6 SoC lines.
The Xeon 6700E can scale up to 144 cores in efficiency, trading advanced instruction features for lower density and power consumption.
Meanwhile, the Xeon 6 SoC includes accelerators for vRAN workloads, as well as high-speed networking and support for AI and multimedia tasks often handled by a GPU in larger deployments.
Companies such as Ericsson and Nokia continue to deploy Intel-based platforms in commercial networks, demonstrating that long-term partnerships still influence purchasing decisions.
AMD will need to demonstrate measurable gains beyond core accounts to change established supplier relationships.
Sorano could represent the last major version of the Zen 5 Epyc before the arrival of Venice, AMD’s next-generation server processor planned for 2026.
It remains unclear whether this iteration will materially change the economics of telecommunications infrastructure: base increases alone rarely determine purchasing cycles in a conservative sector.
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