Cheap $50 hack shows Intel and AMD security walls crumble as researchers bypass chip defenses using simple memory interposer trick
- An interposition of $ 50 can replay the encrypted traffic and undermine the Enclave memory, say the experts
- Intel SGX and AMD SEV-SNP both fall to replay the manipulation
- Compromise in terms of equipment favored scalability, leaving unprotected freshness and integrity
The academics of Ku Leuven and the University of Birmingham have shown how a simple interusing can undermine the material protections of Intel and AMD processors.
The teams have built and tested a cheap interposer for less than $ 50 which is physically between a CPU and DDR4 memory modules.
They have shown that with these cheap components, an attacker can observe, alias and replay encrypted memory traffic to undermine confidence enclaves designed to protect sensitive data in the cloud.
Breaking deterministic encryption
The interposer is a small circuit placed on the path of the memory signal which contains analog switches controlled by a microcontroller.
By returning these switches, the device can selectively redirect the address and control lines and the control lines so that two distinct physical addresses point to the same dramatic cells.
Since SGX and SEV-SNP use deterministic memory encryption which depends on clear text entries and address, the same clear text at the same product address always the same encrypted text.
The striker therefore captures the encrypted text at an address observed, and later obliged the processor to read from an alias address.
This means that the deterministic encryption gives a valid clear deciphering text which is stunned or chosen by the attacker.
This proofreading method allows arbitrary readings and written in an enclave memory otherwise protected on systems where the encryption key and address semantics allow such operations.
The researchers revealed two distinct techniques, beating RAM and electronic listening, which both exploit the deterministic encryption used in trusted execution environments.
In the case of the beating RAM, the method works against Intel and AMD processors.
Researchers say it: “Explain the fundamental limits of evolving memory encryption conceptions currently used by Intel and AMD”.
“Ram […] is capable of dynamically introducing alias of memory at the time of execution. Consequently, the RAM can bypass the AMD and AMD start -up alias alias checks. “”
The associated electronic listening technique adopts a mapping approach which combines encrypted text blocks observed with probable clear text values, allowing the partial reconstruction of the secrets used during cryptographic operations and the possible recovery of certificate keys.
Electronic listening is based on the construction of a quantified text text dictionary known for current values within algorithms such as ECDSA.
It then corresponds to the encrypted sequences against this dictionary until enough values are recovered to rebuild the keys.
Although electronic listening is more with a high intensity of equipment than the RAM prototype of threshing, it demonstrates passive threats of decryption which do not require active falsification.
Because the two attacks target DDR4 signage and rely on deterministic encryption, systems using DDR5 or TDX which avoid deterministic patterns are less vulnerable to these exact methods.
The researchers stressed that vulnerability stems from a choice of deliberate engineering where determinism and scalability have been priority over freshness and integrity.
Intel and AMD both maintain their confidence enclaves are not designed to resist physical attacks, emphasizing the protections on compromises on the software level, and not on the scenarios where the attackers install equipment between the CPU and the memory.
However, the fact that such attacks require only a cheap processor interusing questions about the practicality of excluding them from the threat model.
The problem solving the problem probably requires material changes, such as the adoption of probabilistic encryption or the addition of integrity and freshness checks in memory encryption.
These approaches are more difficult to evolve in large spaces of memory, which explains why deterministic conceptions have been chosen.
Until more resilient conceptions arrive, organizations using enclaves for sensitive tasks must recognize that their strongest defenses can fail against attackers with modest resources and physical access.
Via Arstechnica
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